Barış Arslan

Assistant Professor

PhD, University of California, San Diego

barisarslan@sehir.edu.tr

Office: East Campus, 103

Phone: +90 216 559 9000

Bio: Baris Arslan received his B.S. degree in Computer Engineering from Bilkent University and the M.S. and Ph.D. degrees in Computer Science & Engineering from the University of California, San Diego. He has worked in Intel Corp., Marvell Semiconductor and Qualcomm Inc. from 2005 to 2013, driving structural test efforts for state-of-the-art SOCs and most recently the Design-for-Test strategy and post-silicon issue management for the Qualcomm Adreno family of GPUs. His research interest includes data-driven test methods, design-for-test methods, big data analysis and applications of machine learning techniques particularly in test field.

Research Interests: Big Data Analysis, Data-Driven IC Test Methods, Design-for-Test (DFT), Applications of Machine Learning Techniques

Funded projects:

Member of research Groups:

Publications:
  • 1. Baris Arslan, Alex Orailoglu: Power-Aware Delay Test Quality Optimization for Multiple Frequency Domains. IEEE Trans. on CAD of Integrated Circuits and Systems 35(1):141-154 (2016). [1 Citation]
  • 2. Baris Arslan, Alex Orailoglu: Aggressive Test Cost Reductions Through Continuous Test Effectiveness Assessment. IEEE Trans. on CAD of Integrated Circuits and Systems (2016).
  • 3. Baris Arslan: Small Delay Defect Diagnosis through Failure Observation Ordering. IEEE International Conference on Automation, Quality and Testing, Robotics (ATQR), 2016.
  • 4. A.Bulut, T. Arıcı, O. Guzey, B. Arslan and A. Cakmak. "Training the Data Scientists of the Future", Big Data and Analytics Education Conference (EDCON), 2014.
  • 5. Baris Arslan, Alex Orailoglu: Full exploitation of process variation space for continuous delivery of optimal delay test quality. ASP-DAC 2013: 552-557. [3 Citations]
  • 6. Baris Arslan, Alex Orailoglu: Tracing the best test mix through multi-variate quality tracking. VTS 2013: 1-6. [2 Citations]
  • 7. Baris Arslan, Alex Orailoglu: Delay test resource allocation and scheduling for multiple frequency domains. VTS 2012: 114-119. [2 Citations]
  • 8. Baris Arslan, Alex Orailoglu: Adaptive Test Framework for Achieving Target Test Quality at Minimal Cost. Asian Test Symposium 2011: 323-328. [4 Citations]
  • 9. Baris Arslan, Alex Orailoglu: Adaptive test optimization through real time learning of test effectiveness. DATE 2011: 1430-1435. [5 Citations]
  • 10. Baris Arslan, Alex Orailoglu: Delay test quality maximization through process-aware selection of test set size. ICCD 2010: 390-395. [5 Citations]
  • 11. Baris Arslan, Alex Orailoglu: CircularScan: A Scan Architecture for Test Cost Reduction. DATE 2004: 1290-1295. [54 Citations]
  • 12. Baris Arslan, Alex Orailoglu: Design space exploration for aggressive test cost reduction in CircularScan architectures. ICCAD 2004: 726-731.
  • 13. Baris Arslan, Ozgur Sinanoglu, Alex Orailoglu: Extending the Applicability of Parallel-Serial Scan Designs. ICCD 2004: 200-203. [3 Citations]
  • 14. Baris Arslan, Alex Orailoglu: Test Cost Reduction Through A Reconfigurable Scan Architecture. ITC 2004: 945-952. [23 Citations]
  • 15. Baris Arslan, Alex Orailoglu: Extracting Precise Diagnosis of Bridging Faults from Stuck-at Fault Information. Asian Test Symposium 2003: 230-235. [14 Citations]
  • 16. B. Arslan and A. Orailoglu, "Perfect Conservation of Diagnostic Information in Aggressive Reduction of SOC Test Bandwidth and Use”, IEEE European Test Symposium (ETS), pp. 13-14, 2003.
  • 17. B. Arslan and A. Orailoglu, "Aggressive SOC Test Response Compaction with Full Diagnostic Information Conservation”, IEEE International Test Synthesis Workshop (ITSW), 2003.
  • 18. Baris Arslan, Alex Orailoglu: Fault Dictionary Size Reduction through Test Response Superposition. ICCD 2002: 480-. [20 Citations]

2016 (3)

  • 1. Baris Arslan, Alex Orailoglu: Power-Aware Delay Test Quality Optimization for Multiple Frequency Domains. IEEE Trans. on CAD of Integrated Circuits and Systems 35(1):141-154 (2016). [1 Citation]
  • 2. Baris Arslan, Alex Orailoglu: Aggressive Test Cost Reductions Through Continuous Test Effectiveness Assessment. IEEE Trans. on CAD of Integrated Circuits and Systems (2016).
  • 3. Baris Arslan: Small Delay Defect Diagnosis through Failure Observation Ordering. IEEE International Conference on Automation, Quality and Testing, Robotics (ATQR), 2016.

2014 (1)

  • 4. A.Bulut, T. Arıcı, O. Guzey, B. Arslan and A. Cakmak. "Training the Data Scientists of the Future", Big Data and Analytics Education Conference (EDCON), 2014.

2013 (2)

  • 5. Baris Arslan, Alex Orailoglu: Full exploitation of process variation space for continuous delivery of optimal delay test quality. ASP-DAC 2013: 552-557. [3 Citations]
  • 6. Baris Arslan, Alex Orailoglu: Tracing the best test mix through multi-variate quality tracking. VTS 2013: 1-6. [2 Citations]

2012 (1)

  • 7. Baris Arslan, Alex Orailoglu: Delay test resource allocation and scheduling for multiple frequency domains. VTS 2012: 114-119. [2 Citations]

2011 (2)

  • 8. Baris Arslan, Alex Orailoglu: Adaptive Test Framework for Achieving Target Test Quality at Minimal Cost. Asian Test Symposium 2011: 323-328. [4 Citations]
  • 9. Baris Arslan, Alex Orailoglu: Adaptive test optimization through real time learning of test effectiveness. DATE 2011: 1430-1435. [5 Citations]

2010 (1)

  • 10. Baris Arslan, Alex Orailoglu: Delay test quality maximization through process-aware selection of test set size. ICCD 2010: 390-395. [5 Citations]

2004 (4)

  • 11. Baris Arslan, Alex Orailoglu: CircularScan: A Scan Architecture for Test Cost Reduction. DATE 2004: 1290-1295. [54 Citations]
  • 12. Baris Arslan, Alex Orailoglu: Design space exploration for aggressive test cost reduction in CircularScan architectures. ICCAD 2004: 726-731.
  • 13. Baris Arslan, Ozgur Sinanoglu, Alex Orailoglu: Extending the Applicability of Parallel-Serial Scan Designs. ICCD 2004: 200-203. [3 Citations]
  • 14. Baris Arslan, Alex Orailoglu: Test Cost Reduction Through A Reconfigurable Scan Architecture. ITC 2004: 945-952. [23 Citations]

2003 (3)

  • 15. Baris Arslan, Alex Orailoglu: Extracting Precise Diagnosis of Bridging Faults from Stuck-at Fault Information. Asian Test Symposium 2003: 230-235. [14 Citations]
  • 16. B. Arslan and A. Orailoglu, "Perfect Conservation of Diagnostic Information in Aggressive Reduction of SOC Test Bandwidth and Use”, IEEE European Test Symposium (ETS), pp. 13-14, 2003.
  • 17. B. Arslan and A. Orailoglu, "Aggressive SOC Test Response Compaction with Full Diagnostic Information Conservation”, IEEE International Test Synthesis Workshop (ITSW), 2003.

2002 (1)

  • 18. Baris Arslan, Alex Orailoglu: Fault Dictionary Size Reduction through Test Response Superposition. ICCD 2002: 480-. [20 Citations]

Journal Papers (2)

  • 1. Baris Arslan, Alex Orailoglu: Power-Aware Delay Test Quality Optimization for Multiple Frequency Domains. IEEE Trans. on CAD of Integrated Circuits and Systems 35(1):141-154 (2016). [1 Citation]
  • 2. Baris Arslan, Alex Orailoglu: Aggressive Test Cost Reductions Through Continuous Test Effectiveness Assessment. IEEE Trans. on CAD of Integrated Circuits and Systems (2016).

Conference / Workshop Papers (16)

  • 3. Baris Arslan: Small Delay Defect Diagnosis through Failure Observation Ordering. IEEE International Conference on Automation, Quality and Testing, Robotics (ATQR), 2016.
  • 4. A.Bulut, T. Arıcı, O. Guzey, B. Arslan and A. Cakmak. "Training the Data Scientists of the Future", Big Data and Analytics Education Conference (EDCON), 2014.
  • 5. Baris Arslan, Alex Orailoglu: Full exploitation of process variation space for continuous delivery of optimal delay test quality. ASP-DAC 2013: 552-557. [3 Citations]
  • 6. Baris Arslan, Alex Orailoglu: Tracing the best test mix through multi-variate quality tracking. VTS 2013: 1-6. [2 Citations]
  • 7. Baris Arslan, Alex Orailoglu: Delay test resource allocation and scheduling for multiple frequency domains. VTS 2012: 114-119. [2 Citations]
  • 8. Baris Arslan, Alex Orailoglu: Adaptive Test Framework for Achieving Target Test Quality at Minimal Cost. Asian Test Symposium 2011: 323-328. [4 Citations]
  • 9. Baris Arslan, Alex Orailoglu: Adaptive test optimization through real time learning of test effectiveness. DATE 2011: 1430-1435. [5 Citations]
  • 10. Baris Arslan, Alex Orailoglu: Delay test quality maximization through process-aware selection of test set size. ICCD 2010: 390-395. [5 Citations]
  • 11. Baris Arslan, Alex Orailoglu: CircularScan: A Scan Architecture for Test Cost Reduction. DATE 2004: 1290-1295. [54 Citations]
  • 12. Baris Arslan, Alex Orailoglu: Design space exploration for aggressive test cost reduction in CircularScan architectures. ICCAD 2004: 726-731.
  • 13. Baris Arslan, Ozgur Sinanoglu, Alex Orailoglu: Extending the Applicability of Parallel-Serial Scan Designs. ICCD 2004: 200-203. [3 Citations]
  • 14. Baris Arslan, Alex Orailoglu: Test Cost Reduction Through A Reconfigurable Scan Architecture. ITC 2004: 945-952. [23 Citations]
  • 15. Baris Arslan, Alex Orailoglu: Extracting Precise Diagnosis of Bridging Faults from Stuck-at Fault Information. Asian Test Symposium 2003: 230-235. [14 Citations]
  • 16. B. Arslan and A. Orailoglu, "Perfect Conservation of Diagnostic Information in Aggressive Reduction of SOC Test Bandwidth and Use”, IEEE European Test Symposium (ETS), pp. 13-14, 2003.
  • 17. B. Arslan and A. Orailoglu, "Aggressive SOC Test Response Compaction with Full Diagnostic Information Conservation”, IEEE International Test Synthesis Workshop (ITSW), 2003.
  • 18. Baris Arslan, Alex Orailoglu: Fault Dictionary Size Reduction through Test Response Superposition. ICCD 2002: 480-. [20 Citations]
  • 1. Baris Arslan, Alex Orailoglu: CircularScan: A Scan Architecture for Test Cost Reduction. DATE 2004: 1290-1295. [54 Citations]
  • 2. Baris Arslan, Alex Orailoglu: Test Cost Reduction Through A Reconfigurable Scan Architecture. ITC 2004: 945-952. [23 Citations]
  • 3. Baris Arslan, Alex Orailoglu: Fault Dictionary Size Reduction through Test Response Superposition. ICCD 2002: 480-. [20 Citations]
  • 4. Baris Arslan, Alex Orailoglu: Extracting Precise Diagnosis of Bridging Faults from Stuck-at Fault Information. Asian Test Symposium 2003: 230-235. [14 Citations]
  • 5. Baris Arslan, Alex Orailoglu: Adaptive test optimization through real time learning of test effectiveness. DATE 2011: 1430-1435. [5 Citations]
  • 6. Baris Arslan, Alex Orailoglu: Delay test quality maximization through process-aware selection of test set size. ICCD 2010: 390-395. [5 Citations]
  • 7. Baris Arslan, Alex Orailoglu: Adaptive Test Framework for Achieving Target Test Quality at Minimal Cost. Asian Test Symposium 2011: 323-328. [4 Citations]
  • 8. Baris Arslan, Alex Orailoglu: Full exploitation of process variation space for continuous delivery of optimal delay test quality. ASP-DAC 2013: 552-557. [3 Citations]
  • 9. Baris Arslan, Ozgur Sinanoglu, Alex Orailoglu: Extending the Applicability of Parallel-Serial Scan Designs. ICCD 2004: 200-203. [3 Citations]
  • 10. Baris Arslan, Alex Orailoglu: Tracing the best test mix through multi-variate quality tracking. VTS 2013: 1-6. [2 Citations]
  • 11. Baris Arslan, Alex Orailoglu: Delay test resource allocation and scheduling for multiple frequency domains. VTS 2012: 114-119. [2 Citations]
  • 12. Baris Arslan, Alex Orailoglu: Power-Aware Delay Test Quality Optimization for Multiple Frequency Domains. IEEE Trans. on CAD of Integrated Circuits and Systems 35(1):141-154 (2016). [1 Citation]
  • 13. Baris Arslan, Alex Orailoglu: Design space exploration for aggressive test cost reduction in CircularScan architectures. ICCAD 2004: 726-731.
  • 14. A.Bulut, T. Arıcı, O. Guzey, B. Arslan and A. Cakmak. "Training the Data Scientists of the Future", Big Data and Analytics Education Conference (EDCON), 2014.
  • 15. B. Arslan and A. Orailoglu, "Perfect Conservation of Diagnostic Information in Aggressive Reduction of SOC Test Bandwidth and Use”, IEEE European Test Symposium (ETS), pp. 13-14, 2003.
  • 16. B. Arslan and A. Orailoglu, "Aggressive SOC Test Response Compaction with Full Diagnostic Information Conservation”, IEEE International Test Synthesis Workshop (ITSW), 2003.
  • 17. Baris Arslan, Alex Orailoglu: Aggressive Test Cost Reductions Through Continuous Test Effectiveness Assessment. IEEE Trans. on CAD of Integrated Circuits and Systems (2016).
  • 18. Baris Arslan: Small Delay Defect Diagnosis through Failure Observation Ordering. IEEE International Conference on Automation, Quality and Testing, Robotics (ATQR), 2016.
İstanbul Şehir University
Altunizade Mah. Oymacı Sok. No: 15
34660 Istanbul, Turkey
Email: cs@sehir.edu.tr
Phone: +90 216 559 9000